LPC2364

芯片信息

型號 封裝 在線定購
LPC2364FBD100(查看) LQFP100

引腳布局

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技術資料—— LPC2364 PDF技術資料

LPC2364 概述

The LPC2364 microcontroller is based on a 16-bit/32-bit ARM7TDMI-S CPU with real-time emulation that combines the microcontroller with 128 kB of embedded high-speed flash memory. A 128-bit wide memory interface and a unique accelerator architecture enable 32-bit code execution at the maximum clock rate. For critical performance in interrupt service routines and DSP algorithms, this increases performance up to 30 pct over Thumb mode. For critical code size applications, the alternative 16-bit Thumb mode reduces code by more than 30 pct with minimal performance penalty.

The LPC2364 is ideal for multi-purpose serial communication applications. It incorporates a 10/100 Ethernet Media Access Controller (MAC), USB full speed device with 4 kB of endpoint RAM, four UARTs, two CAN channels, an SPI interface, two Synchronous Serial Ports (SSP), three I2C interfaces, and an I2S interface. This blend of serial communications interfaces combined with an on-chip 4 MHz internal oscillator, SRAM of up to 32 kB, 16 kB SRAM for Ethernet, 8 kB SRAM for USB and general purpose use, together with 2 kB battery powered SRAM make the LPC2364 very well suited for communication gateways and protocol converters. Various 32-bit timers, an improved 10-bit ADC, 10-bit DAC, one PWM unit, a CAN control unit, and up to 70 fast GPIO lines with up to 12 edge or level sensitive external interrupt pins make the LPC2364 particularly suitable for industrial control and medical systems.

LPC2364 參數
LPC2364 存儲器
FLASH (kB) 128
RAM (kB) 34
LPC2364 性能參數
fmax (MHz) 72
I/Opins 70
UART 4
I²C 3
I²S 1
SPI 1
SSP 2
ADC 6
DAC 1
定時器 4
PWM 6
I/O 電壓 (V) 3.3
CPU 電壓 (V) 3.3
LPC2364 封裝與引腳
LQFP100



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